Advances in integrated circuit manufacturing technologies make possible electronic systems comprising tens or even hundreds of millions of active devices. In addition, increased numbers of interconnection layers provide for more signal wiring and more complex control schemes. Among other things, consumer demand for such systems has led to increased system performance, decreased device size, and greater feature sets. The direct result of system and technology improvements is ever-increasing design complexity. The design complexity drives engineering challenges with regard to circuit design, system implementation/control, chip fabrication, and the like. This complexity has, for example, driven greater scrutiny of the systems architectures, logic circuits, interconnection schemes, and control circuitry. As a result, new architectures, technologies, and circuit families have been developed which can take advantage of reduced total device count, smaller device sizes, and simplified wiring/control schemes. The various systems architectures provide certain benefits and costs while requiring careful design consideration.
The data path within a system is a critical architectural component of high-speed digital systems designed to process data. The implementation choice for the architecture of the data path directly impacts overall system performance. For example, creating a data path based on a pipelined architecture can boost performance by executing multiple tasks simultaneously. Also, the choices of the logic circuit families that make up the logic gates of a digital system may greatly influence system performance. Logic circuits fall into two broad categories, static circuits and dynamic circuits. While static circuits find many applications where signal integrity and system robustness are paramount design criteria, dynamic circuits find many applications where system performance and circuit density are paramount. Interest has been focused on circuit families that can drastically reduce the amount of required global clock and control signal interconnect. Research has focused on circuit families that do not require a clock signal, such as asynchronous or self-timed circuits, as such circuits have distinct advantages over their clocked counterparts because the need for external control signals is reduced or eliminated.